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Processor register
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#	Item
51	A Formally-Verified C Compiler Supporting Floating-Point Arithmetic Sylvie Boldo∗ , Jacques-Henri Jourdan† , Xavier Leroy† , and Guillaume Melquiond∗ ∗ Inria Saclay–ˆIle-de-France & LRI, CNRS UMR 8623, Univ Add to Reading List Source URL: www.lri.fr Language: English - Date: 2013-04-16 09:27:03 Computer arithmetic Computing Software engineering Computer architecture IEEE floating point Double-precision floating-point format Extended precision Processor register Compiler correctness Rounding Fortran Single-precision floating-point format
52	Everybody be cool, this is a roppery! Vincenzo Iozzo zynamics GmbH Tim Kornau zynamics GmbH Add to Reading List Source URL: www.trailofbits.com Language: English - Date: 2016-04-15 11:36:17 Computing Computer architecture Computer engineering Central processing unit Return-oriented programming Instruction set Processor register Machine code Reduced instruction set computing Gadget Subroutine Stack machine
53	Optimizing M AKWA on GPU and CPU Thomas Pornin, <> May 18, 2015 Abstract We present here optimized implementations of the M AKWA password hashing Add to Reading List Source URL: www.bolet.org Language: English - Date: 2015-09-06 14:08:28 Computer arithmetic Modular arithmetic Central processing unit Search algorithms Exponentials Exponentiation by squaring Montgomery modular multiplication Hash function Processor register 64-bit computing Euclidean vector
54	COMP 520 FallVirtual machines (1) Virtual machines Add to Reading List Source URL: www.sable.mcgill.ca Language: English - Date: 2007-10-19 00:48:21 Computing Computer architecture Software Central processing unit Assembly languages Programming language implementation Instruction set Bytecode Virtual machine Java bytecode Processor register AT&T Hobbit
55	Lecture: Out-of-order Processors • Topics: branch predictor wrap-up, a basic out-of-order processor with issue queue, register renaming, and reorder buffer 1 Add to Reading List Source URL: www.eng.utah.edu Language: English - Date: 2015-02-18 09:37:16
56	PDF Document Add to Reading List Source URL: mesl.ucsd.edu Language: English - Date: 2014-04-07 23:09:33 Computing Computer architecture Computer engineering Central processing unit Parallel computing Emerging technologies Floating point Memristor Floating-point unit General-purpose computing on graphics processing units Kernel Processor register
57	PDF Document Add to Reading List Source URL: sysrun.haifa.il.ibm.com Language: English - Date: 2009-08-27 04:46:23 Computer programming Software engineering Computing Subroutines Recursion Calling convention Pointer Tree traversal Struct Processor register Thread
58	PDF Document Add to Reading List Source URL: mesl.ucsd.edu Language: English - Date: 2014-04-29 20:45:24 Computer architecture Computing Computer engineering Central processing unit Parallel computing Instruction set SIMD Processor register Microarchitecture Cell Very long instruction word
59	Exploiting Eager Register Release in a Redundantly Multi-Threaded Processor Niti Madan, Rajeev Balasubramonian School of Computing, University of Utah {niti, rajeev}@cs.utah.edu ∗ Abstract Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2006-10-26 00:39:27
60	Porting GCC to the AMD64 architecture Jan Hubiˇcka ˇ s. r. o. SuSE CR, , http://www.ucw.cz/˜hubicka Add to Reading List Source URL: gcc.cybermirror.org Language: English - Date: 2004-08-29 18:00:00 X86 architecture Subroutines Instruction set architectures Assembly languages X86-64 Stack machine Function prologue X86 Processor register Computer architecture Computing Software engineering

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